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RMPA0951AT
September 2004
RMPA0951AT
3V Cellular CDMA PowerEdgeTM Power Amplifier Module
General Description
The RMPA0951AT is a dual mode, small-outline Power Amplifier Module (PAM) for Cellular CDMA personal communication system applications. The PA is internallymatched to 50 and DC blocked which minimizes the use of external components and reduces circuit complexity for system designers. High AMPS/CDMA efficiency and good linearity are achieved using our InGaP Heterojunction Bipolar Transistor (HBT) process.
Features
* * * * * * * Single positive-supply operation High dual-mode (AMPS/CDMA) efficiency Excellent linearity Small size: 6.0 x 6.0 x 1.5 mm3 LCC package 50 matched input and output module Adjustable quiescent current and power-down mode Suitable for CDMA and CDMA2000 1X systems
Device
Absolute Ratings1
Symbol Vc1, Vc2 Vref Pin VSWR Tc Tstg Parameter Supply Voltage Reference Voltage RF Input Power2 Load VSWR Case Operating Temperature Storage Temperature Ratings 6.0 1.5 to 4.0 +7 6:1 -30 to +85 -55 to +150 Units V V dBm C C
Notes: 1: No permanent damage with only one parameter set at extreme limit and other parameters typical. 2: Typical RF input powers for (+28dBm, CDMA) is -3dBm and for (+31dBm, AMPS) is +2dBm.
(c)2004 Fairchild Semiconductor Corporation
RMPA0951AT Rev. D
RMPA0951AT
Electrical Characteristics3
Parameter Frequency Range Gain (Pout = +28dBm) Gain (Pout = +31dBm) Analog Output Power Power-Added Efficiency CDMA (Pout = +28dBm) Analog (Pout = +31.5dBm) ACPR15 ACPR25 Rx-Band Noise Power (All Power Levels) Noise Figure Input VSWR (50) Output VSWR (50) Stability (All spurious)4,7 80 2 3.0 2.0 3.4 3.0 16 Harmonics (Po < 28dBm) 2fo, 3fo, 4fo7 Quiescent Current Power Shutdown Current6 Vcc Vref Iref 31 32 44 35 50 -52 -58 -135 3 1.5:1 2.5:1 -60 -30 120 10 4.0 3.2 2.5:1 -46 -55 Min 824 30 29 Typ Max 849 Units MHz dB dB dBm % % dBc dBc dBm/Hz dB -- -- dBc dBc mA A V V mA
Notes: 3: All parameters to be met at Ta = +25C, Vcc = +3.4V, Vref = 3.0V and load VSWR 1.2:1. 4: Load VSWR 6:1 all phase angles. 5: CDMA waveform measured using the ratio of the average power within the 1.23 MHz signal channel to the power within a 30 kHz resolution bandwidth, at a 885 KHz offset, Pout = 28dBm, offset is 885 KHz, 1.98 MHz. 6: No applied RF signal. Vcc = +3.4V nominal, Vref = +0.2V maximum. 7: Guaranteed by design.
(c)2004 Fairchild Semiconductor Corporation
RMPA0951AT Rev. D
RMPA0951AT
I/O 1 INDICATOR 1 6 1.
6.00 TYP. 6.01 MAX.
2
PA0951AT PPYYWW U31XX
6.00 TYP. 6.01 MAX.
5
3
4 1.499 TYP. 1.60 MAX.
.004
0.00
1.09 1.74
3.72 4.25 4.91
6.00 5.25 5.01
3
6.00
Pin # 1 2 3 4 5 6 7
Description Vcc1 RF IN Vref Vcc2 RF OUT N/C GND
4 5.01 4.25
3.36 2.64 1.07 0.85 0.00 4x R.045 Dimensions in mm
2
7
5
3.36 2.64
1 0.91 5.01
6
0.99 0.10 METAL PULL BACK ALL AROUND 0.00
Figure 1. Package Outline and Pin Designations
PA MODULE
Vcc1 (1)
(TOPSIDE VIEW)
COLLECTOR BIAS 1 N/C (6)
INTERSTAGE MATCH INPUT MATCHING NETWORK OUTPUT MATCHING NETWORK
RF IN (2)
INPUT STAGE INPUT STAGE BIAS
MMIC
OUTPUT STAGE OUTPUT STAGE BIAS
RF OUT (5)
Vcc=3.4V (nom) Vref=3.0V (nom) 824-849 MHz 50 I/O
Vref (3)
REFERENCE ADJUST
GND (Pin 7)COLLECTOR (Package Bias) BIAS 2
Vcc2 (4)
Figure 2. Functional Block Diagram
(c)2004 Fairchild Semiconductor Corporation RMPA0951AT Rev. D
RMPA0951AT
With device marking oriented right side up, RF IN is on the left and RF OUT is on the right. Vcc = +3.4V nominal. Vref = +3.0V nominal to obtain Iccq = 80 mA. Operation at lower or higher quiescent currents can be achieved by decreasing or increasing Vref voltage relative to +3.0V. First ground the PCB (GND terminal) and apply +3.4V to the collector supply terminals (Vcc1, Vcc2). Next apply +3.0V to the reference supply (Vref terminal). Quiescent collector current with no RF applied will be about 80 mA. Reference supply current with or without RF applied will be about 15 mA. When turning amplifier off, reverse power supply sequence. Apply -20dBm RF input power at Cellular frequency (824-849 MHz). After making any initial small signal measurements at this drive level, input power may be increased up to a maximum of +7dBm for large signal, analog (AMPS) or digital CDMA measurements. Do not exceed +7dBm input power.
Vcc1
PCB Specifications: Material: Rogers R04003 Dimensions: 2.0"x1.5"x0.032" Metallization: 1/2 oz Copper Cladding
Vref
Vcc2
Figure 3. Evaluation Board Layout and Instructions
PCB Schematic
Note: Addition of C3 bypass capacitor on Vref pin recommended to minimize Rx band noise C1* 3.3 F
Vcc1 SMA1 RF IN Vref C3* 1000 pF 50 TRL
1
6 50 TRL
N/C SMA2 RF OUT Vcc2 C2* 3.3 F
2 RMPA0951AT 3
5
4
7
(package base)
* Minimum bypass capacitance recommended for best linearity/low-noise performance.
Figure 4. Evaluation Board Schematic
(c)2004 Fairchild Semiconductor Corporation
RMPA0951AT Rev. D
RMPA0951AT
Application Information
Precautions to Avoid Permanent Device Damage: * Cleanliness: Observe proper handling procedures to ensure clean devices and PCBs. Devices should remain in their original packaging until component placement to ensure no contamination or damage to RF, DC & ground contact areas. * Device Cleaning: Standard board cleaning techniques should not present device problems provided that the boards are properly dried to remove solvents or water residues. * Static Sensitivity: Follow ESD precautions to protect against ESD damage: - A properly grounded static-dissipative surface on which to place devices. - Static-dissipative floor or mat. - A properly grounded conductive wrist strap for each person to wear while handling devices. - General Handling: Handle the package on the top with a vacuum collet or along the edges with a sharp pair of bent tweezers. Avoiding damaging the RF, DC, & ground contacts on the package bottom. Do not apply excessive pressure to the top of the lid. - Device Storage: Devices are supplied in heat-sealed, moisture-barrier bags. In this condition, devices are protected and require no special storage conditions. Once the sealed bag has been opened, devices should be stored in a dry nitrogen environment. Device Usage: Fairchild recommends the following procedures prior to assembly. * Dry-bake devices at 125C for 24 hours minimum. Note: The shipping trays cannot withstand 125C baking temperature. * Assemble the dry-baked devices within 7 days of removal from the oven. * During the 7-day period, the devices must be stored in an environment of less than 60% relative humidity and a maximum temperature of 30C * If the 7-day period or the environmental conditions have been exceeded, then the dry-bake procedure must be repeated. Solder Materials & Temperature Profile: Reflow soldering is the preferred method of SMT attachment. Hand soldering is not recommended. Reflow Profile * Ramp-up: During this stage the solvents are evaporated from the solder paste. Care should be taken to prevent rapid oxidation (or paste slump) and solder bursts caused by violent solvent out-gassing. A typical heating rate is 1 - 2C/sec. * Pre-heat/soak: The soak temperature stage serves two purposes; the flux is activated and the board and devices achieve a uniform temperature. The recommended soak condition is: 120 -150 seconds at 150C. * Reflow Zone: If the temperature is too high, then devices may be damaged by mechanical stress due to thermal mismatch or there may be problems due to excessive solder oxidation. Excessive time at temperature can enhance the formation of inter-metallic compounds at the lead/board interface and may lead to early mechanical failure of the joint. Reflow must occur prior to the flux being completely driven off. The duration of peak reflow temperature should not exceed 10 seconds. Maximum soldering temperatures should be in the range 215 -220C, with a maximum limit of 225C. * Cooling Zone: Steep thermal gradients may give rise to excessive thermal shock. However, rapid cooling promotes a finer grain structure and a more crackresistant solder joint. Figure 4 indicates the recommended soldering profile. Solder Joint Characteristics: Proper operation of this device depends on a reliable voidfree attachment of the heatsink to the PWB. The solder joint should be 95% void-free and be a consistent thickness. Rework Considerations: Rework of a device attached to a board is limited to reflow of the solder with a heat gun. The device should not be subjected to more than 225C and reflow solder in the molten state for more than 5 seconds. No more than 2 rework operations should be performed.
(c)2004 Fairchild Semiconductor Corporation
RMPA0951AT Rev. D
RMPA0951AT
240 220 200 183C 180 160 140 DEG (C) 120 100 80 60 40 20 0 0 60 120 TIME (SEC) 180 1C/SEC SOAK AT 150C FOR 60 SEC
10 SEC
45 SEC (MAX) ABOVE 183C
1C/SEC
240
300
Figure 5. Recommended Solder Reflow Profile
(c)2004 Fairchild Semiconductor Corporation
RMPA0951AT Rev. D
RMPA0951AT
Typical Characteristics
Measured performance for typical production amplifiers is represented in the figures below. Key characteristics such as gain, efficiency, output power and linearity are shown for both AMPS and CDMA operation.
RMPA0951AT CDMA Gain vs Pout, Frequency and Temperature 35.00 34.00 33.00 Gain (dB) 32.00 31.00 30.00 29.00 28.00 27.00 26.00 25.00 0.0 4.0 8.0 12.0 16.0 20.0 24.0 28.0 +85C +25C, -30C
824 MHz (+25C) 836.5 MHz (+25C) 849 MHz (+25C) 824 MHz (+85C) 836.5 MHz (+85C) 849 MHz (+85C) 824 MHz (-30C) 836.5 MHz (-30C) 849 MHz (-30C)
RMPA0951AT Vcc = 3.4V, Vref = 3.0V, Pout = 28dBm, CDMA Modulation Total Current vs Freq and Temp 600.0 580.0 560.0 Icc + Iref (mA) 540.0 520.0 500.0 480.0 460.0 440.0 420.0 400.0 824.0 826.5 829.0 831.0 834.0 836.0 839.0 841.0 844.0 846.0 849.0 Frequency (MHz) -30C +25C +85C
Output Power (dBm) RMPA0951AT PAE vs. Output Power (Vcc = 3.4V, f = 836.5MHz, Tc = 25C) Note: 31.5dBm is single-tone CW 50.0 45.0 40.0 35.0 PAE (%) 30.0 25.0 20.0 15.0 10.0 5.0 0.0 0.0 4.0 8.0 12.0 16.0 20.0 Output Power (dBm) 24.0 28.0 32.0 2.0Vref 2.1Vref 2.2Vref 2.3Vref 2.4Vref 2.5Vref 2.6Vref 2.7Vref 2.8Vref 2.9Vref 3.0Vref 35.0 34.0 33.0 32.0 Gain (dB) 31.0 30.0 29.0 28.0 27.0 26.0
RMPA0951AT AMPS Mode Gain vs Temperature/Frequency (Pout = 31.5dBm CW) -30C +25C +85C
25.0 824.0 826.5 829.0 831.5 834.0 836.5 839.0 841.5 844.0 846.5 849.0 Frequency (MHz)
RMPA0951AT Icc vs. Vref and Pout (Vcc = 3.4V, f = 836.5MHz, Tc = 25C) Note: 31.5dBm is single-tone CW 900 800 700 Icc + Iref (mA) 600 Icc (mA) 500 400 300 200 100 0 2.4 P-out=+4dBm 2.5 2.6 2.7 2.8 Vref (V) 2.9 3.0 3.1 P-out=+24dBm P-out=+16dBm P-out=+28dBm P-out=+31.5dBm 900.0 880.0 860.0 840.0 820.0 800.0 780.0 760.0 740.0 720.0
RMPA0951AT Vcc = 3.4V, Vref = 3.0V, Pout = 31.5dBm CW Total Current vs Freq and Temp
-30C +25C +85C
700.0 824.0 826.5 829.0 831.5 834.0 836.5 839.0 841.5 844.0 846.5 849.0 Frequency (MHz) RMPA0951AT Vcc = 3.4V, Vref = 3.0V, Pout = 28dBm CDMA Modulation ACPR1 @ 885kHz, ACPR2 @ 1.98MHz vs Frequency and Temperature -45.00 -47.00 -49.00 -51.00 -53.00 -55.00 -57.00 -59.00 -61.00 -63.00 ACPR2
ACPR1 ACPR1 ACPR1 ACPR2 ACPR2 ACPR2 -30C +25C +85C -30C +25C +85C
RMPA0951AT Adjacent Channel Power Ratio vs Output Power (Vcc = 3.4V, Vref = 3.0V, Ta = +25C) -40.00 ACPR1/ACPR2 (dBc) - Offset: 885 kHz and 1.98 MHz -45.00 -50.00 -55.00 -60.00 -65.00 -70.00 -75.00 -80.00 4.0 8.0 12.0 824 MHz ACPR1 824 MHz ACPR2 836.5 MHz ACPR1 836.5 MHz ACPR2 849 MHz ACPR1 849 MHz ACPR2 16.0 20.0 Pout (dBm) 24.0 28.0 ACPR1,2 (dBc)
ACPR1
-65.00 824.0 826.5 829.0 831.5 834.0 836.5 839.0 841.5 844.0 846.5 849.0 Frequency (MHz)
(c)2004 Fairchild Semiconductor Corporation
RMPA0951AT Rev. D
RMPA0951AT
DC Power Management for Reduced-Power Operating Modes
Many Cellular/PCS handsets can benefit from gain control and DC power management to optimize transmitter performance while operating at backed-off output power levels. Oftentimes, cellular systems will operate at 10-20dB back-off from maximum-rated linear power and peak power-added efficiency. The ability to reduce current consumption under these conditions, without sacrificing linearity, is critical to extending battery life in nextgeneration mobile phones. The RMPA0951AT PA offers the ability to lower quiescent current by more than 60 percent and small-signal gain by 1012dB using a single control voltage (Vref). Even with the amplifier biased for lowest current consumption, high linearity is maintained over the full operating temperature range and at output power levels up to +16dBm. Bias and gain control through Vref provides complete flexibility for the handset designer, allowing the user to define the operation by either an analog (continuously-variable) or digital (discrete-step) voltage input. As an example, reducing the Vref voltage from 3.0V (nominal) to 2.2V can lower PA current consumption by more than 20 percent at an output power of +12dBm. The following charts demonstrate analog and digital control techniques for minimizing DC power consumption at reduced RF output power levels. The first four graphs characterize analog control over a reference voltage (Vref) range of 1.8V to 3.0V. Using analog bias control, quiescent current is reduced to less than 30 mA and small-signal gain is reduced by 12dB at Vref = 1.8V. Operating current at +12dBm is also reduced by 20 percent (25 mA) at Vref = 2.2V and by more than 50 percent (50 mA) at the lowest reference voltage (Vref =1.8V) compared with fixedbias operation at Vref = 3.0V. In all cases, DC current savings is achieved while fully complying with IS-95 linearity requirements. The last four graphs feature digital control performance using three discrete voltage levels (3.0V, 2.2V, 1.8V) to optimize linear PA performance over three output power ranges (< +4dBm, +4dBm to +16dBm, >+16dBm). Alternate output power ranges can be selected depending on the power-probability use in the cellular system.
Cellular PAM-Digital Control Mode
Parameter Low-Power Range Current Gain Linearity Mid-Power Range Current Gain Linearity High-Power Range Current Gain Linearity Min Typ 50 24 -50 +8 +12 120 28.5 -50 540 32.5 -38 +16 Max +8 Units dBm mA dB dBc dBm mA dB dBc dBm mA dB dBc Conditions Vref = 1.8V typ
Vref = 2.2V typ
+16
+28
Vref = 3.0V typ Pout = +28dBm
(c)2004 Fairchild Semiconductor Corporation
RMPA0951AT Rev. D
RMPA0951AT
RMPA0951AT Total Quiescent Current (Icc + Iref) vs. Reference Voltage (Vcc=3.4V, Tc=+25C) 90.0 Total Quiescent Current (mA) 80.0 70.0 Nominal Iccq 60.0 50.0 40.0 30.0 20.0 10.0 3.0 2.9 2.8 2.7 2.6 2.5 2.4 Vref (V) 2.3 2.2 2.1 0.0 2.0
RMPA0951AT PAE vs. Vref at Pout=+16dBm (Vcc=3.4V, f=836.5MHz, Tc=25C) 9.0 8.5 8.0 7.5 7.0 6.5 Nominal PAE 6.0 5.5 3.0 2.9 2.8 2.7 2.6 2.5 2.4 Vref (V) 2.3 2.2 2.1 5.0 2.0 PAE (%)
RMPA0951AT Small-Signal Gain vs. Reference Voltage (Vcc=3.4V, f=836.5MHz, Pout=0 dBm, Tc=25C) 32.0 30.0 Nominal Gain 28.0 26.0 24.0 22.0 20.0 2.0 170.0 160.0 150.0 140.0 130.0 120.0 110.0 100.0 90.0 80.0 70.0 60.0 50.0 40.0 30.0 0.0
RMPA0951AT Total Current (Icc + Iref) vs. Output Power and Vref (Vcc=3.4V, f=836.5 MHz, Tc=25C)
3.0 2.9 2.8 2.7 2.6 2.5 2.4 2.3 2.2 2.1 2.0 Vref Vref Vref Vref Vref Vref Vref Vref Vref Vref Vref
Small-Signal Gain (dB)
Total Current (mA)
3.0
2.9
2.8
2.7
2.6
2.5 2.4 Vref (V)
2.3
2.2
2.1
2.0
4.0
6.0 8.0 10.0 Output Power (dBm)
12.0
14.0
16.0
RMPA0951AT Total Current (Icc + Iref) vs Reference Voltage and Temperature (Vcc=3.4V, f=836.5MHz, Pout=0 dBm) 600.0 LowMid-Power High-Power Power 500.0 400.0 300.0 200.0 100.0 Vref=2.2V 0.0 0.0 Vref=1.8V 4.0 8.0 12.0 Pout (dBm) RMPA0951AT Freq=836.5 MHz, Vcc=3.4V Gain vs Pout and Temp (Digital Control) 35.0 LowPower 30.0 ACPR1 (dBc) Vref=3.0V Gain (dB) 25.0 Vref=2.2V 20.0 Vref=1.8V -30C Vref 1.8V +25C Vref 1.8V +85C Vref 1.8V -30C Vref 2.2V +25C Vref 2.2V +85C Vref 2.2V -30C Vref 3.0V +25C Vref 3.0V +85C Vref 3.0V 16.0 20.0 24.0 28.0 Mid-Power High-Power 16.0 20.0 24.0 28.0 -30C Vref 1.8V +25C Vref 1.8V +85C Vref 1.8V -30C Vref 2.2V +25C Vref 2.2V +85C Vref 2.2V -30C Vref 3.0V +25C Vref 3.0V +85C Vref 3.0V Icc + Iref (mA) Icc + Iref (mA)
RMPA0951AT Freq=836.5 MHz, Vcc=3.4V Total Current (Icc + Iref) vs Pout and Temp (Digital Control) 200.0 LowPower 160.0 Vref=3.0V 120.0 Vref=2.2V 80.0 40.0 Vref=1.8V 0.0 0.0 4.0 -30C Vref 1.8V +25C Vref 1.8V +85C Vref 1.8V -30C Vref 2.2V +25C Vref 2.2V 8.0 Pout (dBm) +85C Vref 2.2V -30C Vref 3.0V +25C Vref 3.0V +85C Vref 3.0V 12.0 16.0 Mid-Power
Vref=3.0V
RMPA0951AT Freq=836.5 MHz, Vcc=3.4V ACPR1 vs Pout and Temp (Digital Control) -40.00 -45.00 -50.00 -55.00 -60.00 -65.00 -70.00 0.0 Vref=1.8V Vref=2.2V -30C Vref 1.8V +25C Vref 1.8V +85C Vref 1.8V -30C Vref 2.2V +25C Vref 2.2V 8.0 12.0 16.0 +85C Vref 2.2V -30C Vref 3.0V +25C Vref 3.0V +85C Vref 3.0V 20.0 24.0 28.0 LowPower Mid-Power High-Power Vref=3.0V
15.0
10.0 0.0
4.0
8.0
12.0
4.0
Pout (dBm)
Pout (dBm)
(c)2004 Fairchild Semiconductor Corporation
RMPA0951AT Rev. D
RMPA0951AT
RMPA0951AT Freq=836.5 MHz, Vcc=3.4V Gain vs Pout and Temp (Digital Control) -50.00 -55.00 ACPR2 (dBc) -60.00 -65.00 Vref=1.8V Vref=3.0V -70.00 -75.00 -80.00 0.0 Vref=2.2V -30C Vref 1.8V +25C Vref 1.8V +85C Vref 1.8V -30C Vref 2.2V +25C Vref 2.2V 4.0 8.0 12.0 16.0 +85C Vref 2.2V -30C Vref 3.0V +25C Vref 3.0V +85C Vref 3.0V 20.0 24.0 28.0 LowPower Mid-Power High-Power
Pout (dBm)
(c)2004 Fairchild Semiconductor Corporation
RMPA0951AT Rev. D
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
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Power247TM PowerEdgeTM PowerSaverTM PowerTrench QFET QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM SILENT SWITCHER SMART STARTTM SPMTM
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DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I13

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